The impact of repetitive unclamped inductive switching on the electrical parameters of low-voltage trench power nMOSFETs

摘要

The impact of hot-carrier injection (HCI) due to repetitive unclamped inductive switching (UIS) on the electrical performance of low-voltage trench power n-type MOSFETs (nMOSFETs) is assessed. Trench power nMOSFETs with 20- and 30-V breakdown voltage ratings in TO-220 packages have been fabricated and subjected to over 100 million cycles of repetitive UIS with different avalanche currents IAV at a mounting base temperature TMB of 150°C. Impact ionization during avalanche conduction in the channel causes hot-hole injection into the gate dielectric, which results in a reduction of the threshold voltage VGSTX, as the number of avalanche cycles N increases. The experimental data reveal a power-law relationship between the change in the threshold voltage ΔVGSTX and N. The results show that the power-law prefactor is directly proportional to the avalanche current. After 100 million cycles, it was observed in the 20-V rated MOSFETs that the power-law prefactor increased by 30% when IAV was increased from 160 to 225 A, thereby approximating a linear relationship. A stable subthreshold slope with avalanche cycling indicates that interface trap generation may not be an active degradation mechanism. The impact of the cell pitch on avalanche ruggedness is also investigated by testing 2.5- and 4- m cell-pitch 30-V rated MOSFETs. Measurements showed that the power-law prefactor reduced by 40% when the cell pitch was reduced by 37.5%. The improved VGSTX stability with the smaller cell-pitch MOSFETs is attributed to a lower avalanche current per unit cell resulting in less hot-hole injection and, hence, smaller VGSTX shift. The 2.5-m cell-pitch MOSFETs also show 25% improved on -state resistance RDSON, better RDSON stability, and 20% less subthreshold slope compared with the 4-m cell-pitch MOSFETs, although with 100% higher initial IDSS and less IDSS stability with avalanche cycling. These results are important for manufacturers of automotive MOSFETs where multiple avalanche occurrences over the lifetime of the MOSFET are expected.